Digital logic and microprocessor design with interfacing / (Record no. 39181)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 01358nam a22002777a 4500 |
| 001 - CONTROL NUMBER | |
| control field | 19247310 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | OSt |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20240318183632.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 230117b |||||||| |||| 00| 0 eng d |
| 010 ## - LIBRARY OF CONGRESS CONTROL NUMBER | |
| LC control number | 2016952181 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9781305859470 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 1305859472 |
| 040 ## - CATALOGING SOURCE | |
| Original cataloging agency | DLC |
| Language of cataloging | eng |
| Description conventions | rda |
| Transcribing agency | DLC |
| Modifying agency | LC |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Edition number | 23rd ed. |
| Classification number | 001.642 |
| Item number | HWA |
| 100 1# - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Hwang, Enoch O., |
| Relator term | author. |
| 9 (RLIN) | 14110 |
| 245 10 - TITLE STATEMENT | |
| Title | Digital logic and microprocessor design with interfacing / |
| Statement of responsibility, etc. | Enoch O. Hwang. |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 2nd edition. |
| 264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE | |
| Place of production, publication, distribution, manufacture | Australia ; |
| -- | Boston, MA : |
| Name of producer, publisher, distributor, manufacturer | Cengage Learning, |
| Date of production, publication, distribution, manufacture, or copyright notice | c2018. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | xxiii, 583 pages: |
| Other physical details | illustrations ; |
| Dimensions | 24 cm |
| 500 ## - GENERAL NOTE | |
| General note | Includes Index. |
| 505 ## - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Table of Contents. - Ch. 1 Introduction to microprocessor design. - Ch. 2 Fundamentals of digital circuits. - Ch. 3 Combinational circuits. - Ch. 4 Standard combinational components. - Ch. 5 Sequential circuits. - Ch. 6 Finite-State machines. - Ch. 7 Dedicated microprocessors. - Ch. 8 General-purpose microprocessors. - Ch. 9 Interfacing microprocessors. - Ch. 10 Xilinx development tutorial - - Altera development tutorial - - Verilog summary - - VHDL Summary. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Logic design |
| General subdivision | Data processing. |
| 9 (RLIN) | 14111 |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Microprocessors |
| General subdivision | Design and construction. |
| 9 (RLIN) | 14112 |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | VHDL (Computer hardware description language) |
| 9 (RLIN) | 14049 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | Dewey Decimal Classification |
| Koha item type | Book |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Home library | Current library | Date acquired | Total Checkouts | Full call number | Barcode | Date last seen | Cost, replacement price | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Dewey Decimal Classification | UMU Fort Portal Campus | UMU Fort Portal Campus | 17/01/2023 | 001.642 HWA | 52071 | 17/01/2023 | 97.00 | 17/01/2023 | Book |